MK2049-45 Description
The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.
MK2049-45 Key Features
- Packaged in 20 pin SOIC
- 3.3 V + 5% operation
- Meets the TR62411, ETS300 011, and GR-1244
- Block Diagram
- 525 Race Street, San Jose, CA 95126
- tel (408) 297-1201