MK2049-45 Description
The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication.
MK2049-45 Key Features
- Packaged in 20 pin SOIC
- 3.3 V + 5% operation
- Meets the TR62411, ETS300 011, and GR-1244
- Locks to 8 kHz + 100 ppm (External mode)
- Buffer Mode allows jitter attenuation of 10
- 50 MHz input
- Exact internal ratios enable zero ppm error
- Output rates include T1, E1, T3, E3, and OC3
- Available in Pb (lead) free package
- See also the MK2049-34 and MK2049-36