IDT72V3632 Overview
36 36 Write Pointer Read Pointer EFB/ORB AEB FFA/IRA AFA FIFO 1 Status Flag Logic FS0 FS1 A0 - A35 10 Programmable Flag Offset Registers FIFO 2 Timing Mode FWFT B0 - B35 EFA/ORA AEA Status Flag Logic Write Pointer IDT, the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncBiFIFO is a trademark of Integrated Device Technology, Inc. MERCIAL TEMPERATURE RANGE DECEMBER 2001 each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. These devices are a synchronous (clocked) FIFO, meaning each port employs a synchronous inter