IDT71V67802 Overview
The IDT71V67602/7802 are high-speed SRAMs organized as 256K x 36/512K x 18. The IDT71V676/78 SRAMs contain write, data, address and control registers. Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until the end of the write cycle.
IDT71V67802 Key Features
- 166MHz 3.5ns clock access time
- 150MHz 3.8ns clock access time
- 133MHz 4.2ns clock access time LBO input selects interleaved or linear burst mode Self-timed write cycle with global wri