Datasheet Summary
CMOS SyncBiFIFO™ WITH BUS MATCHING AND BYTE SWAPPING 64 x 36 x 2
Integrated Device Technology, Inc.
Features
:
- Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted)
- Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions
- Mailbox bypass Register for each FIFO
- Dynamic Port B bus sizing of 36-bits (long word), 18-bits (word), and 9-bits (byte)
- Selection of Big- or Little-Endian format for word and byte bus sizes
- Three modes of byte-order swapping on port B
- Programmable Almost-Full and Almost-Empty Flags
- -
- -
- -
- -
- Microprocessor...