Datasheet4U Logo Datasheet4U.com

IDT723631 - CMOS clocked FIFO memory

General Description

The IDT723631/723641/723651 is a monolithic highspeed, low-power, CMOS clocked FIFO memory.

It supports clock frequencies up to 67 MHz and has read access times as fast as 12ns.

The 512/1024/2048 x 36 dual-port SRAM FIFO buffers data from port A to Port B.

Key Features

  • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge).
  • Clocked FIFO buffering data from Port A to Port B.
  • Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1024 x 36 IDT723651 - 2048 x 36.
  • Synchronous read retransmit capability.
  • Mailbox register in each direction.
  • Programmable Almost-Full and Almost-Empty flags.
  • Microprocessor interface control logic.

📥 Download Datasheet

Datasheet Details

Part number IDT723631
Manufacturer Integrated Device Technology
File Size 334.55 KB
Description CMOS clocked FIFO memory
Datasheet download datasheet IDT723631 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
IDT723633 CMOS unidirectional Synchronous FIFO memories IDT
IDT723623 CMOS unidirectional Synchronous FIFO memories IDT
IDT723643 CMOS unidirectional Synchronous FIFO memories IDT
IDT723652 (IDT7236x2) CMOS SyncBiFIFO IDT
IDT723654 (IDT7236x4) CMOS SyncBiFIFO IDT

Other Datasheets by Integrated Device Technology

Part Number Description
IDT723632 CMOS Bidirectional SyncFIFO memory
IDT723634 CMOS bidirectional synchronous FIFO memory
IDT723611 CMOS SyncFIFO
IDT723612 BiCMOS SyncBi FIFO
IDT723613 CMOS Clocked FIFO

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CMOS SyncFIFO™ 512 x 36, 1024 x 36, 2048 x 36 Integrated Device Technology, Inc. IDT723631 IDT723641 IDT723651 FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • Clocked FIFO buffering data from Port A to Port B • Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1024 x 36 IDT723651 - 2048 x 36 • Synchronous read retransmit capability • Mailbox register in each direction • Programmable Almost-Full and Almost-Empty flags • Microprocessor interface control logic • Input-Ready (IR) and Almost-Full (AF) flags synchronized by CLKA • Output-Ready (OR) and Almost-Empty (AE) flags synchronized by CLKB • Low-power 0.