IDT723642 Key Features
- Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock
- Two independent clocked FIFOs buffering data in opposite directions
- Mailbox bypass register for each FIFO
- Programmable Almost-Full and Almost-Empty flags
- Microprocessor Interface Control Logic
- IRA, ORA, AEA, and AFA flags synchronized by CLKA
- IRB, ORB, AEB, and AFB flags synchronized by CLKB
- Supports clock frequencies up to 67MHz
- Fast access times of 11ns
- Available in 132-pin Plastic Quad Flatpack (PQF) or space-saving 120-pin Thin Quad Flatpack (PF)