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QS5LV919160Q Datasheet 3.3v Low Skew CMOS Pll Clock Driver

Manufacturer: Integrated Device Technology

Overview: QS5LV919 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER INDUSTRIAL TEMPERATURE RANGE 3.

General Description

: QS5LV919 • • • • • • • • • • • • • 3.3V operation JEDEC compatible LVTTL level outputs Clock inputs are 5V tolerant < 300ps output skew, Q0–Q4 2xQ output, Q outputs, Q output, Q/2 output Outputs 3-state and reset while OE/RST low PLL disable

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