QS5LV91970J - 3.3V LOW SKEW CMOS PLL CLOCK DRIVER

Integrated Device Technology

General Description

QS5LV919 3.3V operation JEDEC compatible LVTTL level outputs Clock inputs are 5V tolerant < 300ps output skew, Q0 Q4 2xQ output, Q outputs, Q output, Q/2 outp

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QS5LV91970J 3.3v low skew cmos pll clock driver by Integrated Device Technology - Datasheet Preview

Datasheet Details

Part number	QS5LV91970J
Manufacturer	Integrated Device Technology
File Size	98.35 KB
Description	3.3V LOW SKEW CMOS PLL CLOCK DRIVER
Datasheet	QS5LV91970J Datasheet

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QS5LV91970Q	3.3V LOW SKEW CMOS PLL CLOCK DRIVER
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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QS5LV919 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER INDUSTRIAL TEMPERATURE RANGE 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER FEATURES: DESCRIPTION: QS5LV919 • • • • • • • • • • • • • 3.