Datasheet Summary
512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
FEBRUARY 2008
Features
- Clock frequency: 200, 166, 143 MHz
- Fully synchronous; all signals referenced to a positive clock edge
- Two banks can be operated simultaneously and independently
- Dual internal bank controlled by A11 (bank select)
- Single 3.3V power supply
- LVTTL interface
- Programmable burst length
- (1, 2, 4, 8, full page)
- Programmable burst sequence: Sequential/Interleave
- 2048 refresh cycles every 32 ms
- Random column address every clock cycle
- Programmable CAS latency (2, 3 clocks)
- Burst read/write and burst read/single write operations capability
- Burst termination by...
