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IS61SF12832 - (IS61SF12832 / IS61SF12836) 128K x 36 SYNCHRONOUS FLOW-THROUGH STATIC RAM

General Description

synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications.

It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ISSI's advanced CMOS technology.

Key Features

  • Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns.
  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data inputs and control signals.
  • Pentium™ or linear burst sequence control using MODE input.
  • Three chip enables for simple depth expansion and address pipelining.
  • Common data inputs and data outputs.
  • JEDEC 100-Pin TQFP and 119-pin PBGA package.

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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS61SF12836 (IS61SF12832 / IS61SF12836) 128K x 36 SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61C1024 128K x 8 HIGH-SPEED CMOS STATIC RAM
IS61C1024L 128K x 8 HIGH-SPEED CMOS STATIC RAM
IS61C256 32K x 8 Low Voltage CMOS STATIC RAM
IS61C25616 256K x 8 High Speed CMOS STATIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS61SF12832 IS61SF12836 128K x 32, 128K x 36 SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data inputs and control signals • Pentium™ or linear burst sequence control using MODE input • Three chip enables for simple depth expansion and address pipelining • Common data inputs and data outputs • JEDEC 100-Pin TQFP and 119-pin PBGA package • Single +3.3V +10%, –5% power supply • Power-down snooze mode www.DataSheet4U.