28F256L30 Datasheet | Intel Corporation

Features - High performance Read-While-Write/Erase - 85 ns initial access - 52MHz with zero wait state, 17 ns clock-to-data output synchronous-burst mode - 25 ns asynchronous-page mode - 4-, 8-, 16-, and continuous-word burst mode - Burst suspend - Programmable WAIT configuration - Buffered Enhanced Factory Programming (Buffered EFP): 3.5 µs/byte (Typ) - 1.8 V low-power buffered and non-buffered programming @ 10 µs/byte (Typ) - Architecture - Asymmetrically-blocked architecture - Multiple 8-Mbit partitions: 64Mb and 128Mb devices - Multiple 16-Mbit partitions: 256Mb devices - Four 16-KWord parameter blocks: top or bottom configurations - 64K-Word main blocks - Dual-operation: Read-While-Write (RWW) or Read-While-Erase (RWE) - Status register for partition and device status - Power - 1.7 V - 2.0 V VCC operation - I/O voltage: 2.2 V - 3.3 V - Standby current: 30 µA (Typ) - 4-Word synchronous read current: 17 m A (Typ) @ 54 MHz - Automatic Power Savings (APS) mode - Software - 20 µs (Typ) program suspend - 20 µs (Typ) erase suspend - Intel® Flash Data Integrator (FDI) optimized - Basic mand Set (BCS) and Extended mand Set (ECS) patible - mon Flash Interface (CFI) capable - Security - OTP space: - 64 unique device identifier bits - 64 user-programmable OTP bits - Additional 2048 user-programmable OTP bits - Absolute write protection: VPP = GND - Power-transition erase/program lockout - Individual zero-latency block...