28F001BX-T Datasheet | Intel

Feature Erase Write Lockout during Power Transitions Advanced Packaging JEDEC Pinouts 32-Pin PDIP 32-Lead PLCC TSOP ETOX TM II Nonvolatile Flash Technology EPROM-patible Process Base High-Volume Manufacturing Experience Extended Temperature Options Intel’s 28F001BX-B and 28F001BX-T bine the cost-effectiveness of Intel standard flash memory with features that simplify write and allow block erase These devices aid the system designer by bining the functions of several ponents into one making boot block flash an innovative alternative to EPROM and EEPROM or battery-backed static RAM Many new and existing designs can take advantage of the 28F001BX’s integration of blocked architecture automated electrical reprogramming and standard processor interface The 28F001BX-B and 28F001BX-T are 1 048 576 bit nonvolatile memories organized as 131 072 bytes of 8 bits They are offered in 32-pin plastic DIP 32-lead PLCC and 32-lead TSOP packages Pin assignment conform to JEDEC standards for byte-wide EPROMs These devices use an integrated mand port and state machine for simplified block erasure and byte reprogramming The 28F001BX-T’s block locations provide patibility with microprocessors and microcontrollers that boot from high memory such as Intel’s MCS -186 family 80286 i386 TM i486 TM i860 TM and 80960CA With exactly the same memory segmentation the 28F001BX-B memory map is tailored for microprocessors and microcontrollers that boot from low memory such as Intel’s MCS-51 MCS-196 80960KX and 80960SX families All other features are identical and unless otherwise noted the term 28F001BX can refer to either device throughout the remainder of this document The boot block section includes a reprogramming write lock out feature to guarantee data integrity It is designed to contain secure code which will bring up the system minimally and download code to the other locations of the 28F001BX Intel’s 28F001BX employs advanced CMOS circuitry for systems requiring...