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HCS74MS - Radiation Hardened Dual-D Flip-Flop

General Description

The Intersil HCS74MS is a Radiation Hardened positive edge triggered flip-flop with set and reset.

The HCS74MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.

This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.

Key Features

  • 3 Micron Radiation Hardened SOS CMOS.
  • Total Dose 200K RAD (Si).
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg.
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ).
  • Dose Rate Survivability: >1 x.
  • Dose Rate Upset >10 10 1012 RAD (Si)/s RAD (Si)/s 20ns Pulse.
  • Latch-Up Free Under Any Conditions.
  • Military Temperature Range: -55oC to +125oC.
  • Significant Power Reduction Compared to LSTTL ICs.
  • DC.

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Other Datasheets by Intersil (now Renesas)

Part Number Description
HCS74T Radiation Hardened Dual-D Flip-Flop
HCS00MS Radiation Hardened Quad 2-Input NAND Gate
HCS02MS Radiation Hardened Quad 2-Input NOR Gate
HCS04MS Radiation Hardened Hex Inverter
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HCS74MS September 1995 Radiation Hardened Dual-D Flip-Flop with Set and Reset Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW R1N 1 D1 2 CP1 3 S1N 4 Q1 5 Q1N 6 GND 7 14 VCC 13 R2N 12 D2 11 CP2 10 S2N 9 Q2 8 Q2N Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x • Dose Rate Upset >10 10 1012 RAD (Si)/s RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.