KK4015B Datasheet | Kodenshi AUK Group

.. TECHNICAL DATA Dual 4-Stage Static Shift Register The KK4015B consists of two identical, independent, 4-stage serialinput/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is acplished by a high level on the reset line. Register expansion to 8 stages using one KK4015B package, or to more than 8 stages using additional KK4015B’s is possible. - Operating Voltage Range: 3.0 to 18 V - Maximum input current of 1 µA at 18 V over full package-temperature range; 100 n A at 18 V and 25°C - Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION KK4015BN Plastic KK4015BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Clock Data L H PIN 16=VCC PIN 8= GND X X X Reset L L L H Outputs Q1 L H L Qn Qn-1 Qn-1 L No change X = don’t care .. MAXIMUM RATINGS- Symbol VCC VIN VOUT IIN PD PD Tstg TL - Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to 20 -0.5 to VCC 0.5 -0.5 to VCC 0.5 ±10 750 500 100 -65 to 150 260 Unit V V V m A m W m W °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions....