L29C521PC22 Datasheet | LOGIC Devices Incorporated

L29C520/521 DEVICES INCORPORATED 4 x 8-bit Multilevel Pipeline Register L29C520/521 DEVICES INCORPORATED 4 x 8-bit Multilevel Pipeline Register DESCRIPTION The L29C520 and L29C521 are pinfor-pin patible with the IDT29FCT520/IDT29FCT521 and AMD Am29520/Am29521, implemented in low power CMOS. The L29C520 and L29C521 contain four registers which can be configured as two independent, 2-level pipelines or as one 4-level pipeline. The Instruction pins, I1-0, control the loading of the registers. For either device, the registers may be configured as a four-stage delay line, with data loaded into R1 and shifted sequentially through R2, R3, and R4. Also, for the L29C520, data may be loaded...