MACH1 Datasheet PDF

Lattice MACH1

The MACH® 1 & 2 families from Lattice/Vantis offer high-performance, low cost Complex Programmable Logic Devices (CPLDs), addressing the growing need for speed in networking, telecommunications and computing. The overall beneﬁts for users include guaranteed high performance for entry-to-mid-level logic needs at a low cost.

Part No.	MACH1
Datasheet	MACH1 Download
Manufacturer	Lattice
Description	High-Performance EE CMOS Programmable Logic
Buy	Stock & Price

FEATURES

x x x x x x x x x x x x x High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages SpeedLocking™ – guaranteed ﬁxed timing up to 16 product terms Commercial 5/5.5/6/7.5/10/12/15-ns tPD and Industrial 7.5/10/12/14/18-ns tPD Conﬁgurable macrocells — Programmable polarity — Registered or combinatorial outputs — Internal and I/O feedback paths — D-type or T-type ﬂip-ﬂops — Output Enables — Choice of clocks for each ﬂip-ﬂop — Input registers for MACH 2 family JTAG (IEEE 1149.1)-compatible, 5-V in-system programming available Peripheral component interconnect (PCI) compliant at 5/5.5/6/7.5/10/12 ns Safe for mixed supply voltage system designs Bus-Friendly™ inputs and I/Os reduce risk of unwanted oscillatory outputs Programmable power-down mode results in power savings of up to 75% Supported by Vantis DesignDirect™ software for rapid logic development — Supports HDL design methodologies with results opt...