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MACH1 Datasheet High-performance Ee CMOS Programmable Logic

Manufacturer: Lattice

Datasheet Details

Part number MACH1
Manufacturer Lattice
File Size 1.11 MB
Description High-Performance EE CMOS Programmable Logic
Datasheet MACH1_LatticeSemiconductor.pdf

MACH1 Overview

The MACH® 1 & 2 families from Lattice/Vantis offer high-performance, low cost plex Programmable Logic Devices (CPLDs), addressing the growing need for speed in networking, telemunications and puting. MACH 1 & 2 devices are available in speeds as fast as 5.0-ns tPD and in densities ranging from 32 to 128 macrocells (Tables 1 and 2). The overall benefits for users include guaranteed high performance for entry-to-mid-level logic needs at a low cost. Table 2. MACH 1 and 2 Family Speed Grades1

MACH1 Key Features

  • Programmable polarity
  • Registered or binatorial outputs
  • Internal and I/O feedback paths
  • D-type or T-type flip-flops
  • Output Enables
  • Choice of clocks for each flip-flop
  • Supports HDL design methodologies with results optimized for Vantis
  • Flexibility to adapt to user requirements
  • Software partnerships that ensure customer success Lattice/Vantis and third-party hardware programming support
  • Lattice/VantisPRO™ (formerly known as MACHPRO ®) software for in-system programmability support on PCs and Automated Tes

MACH1 Distributor