LTC6950 Datasheet | Linear Technology

Features LTC6950 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution Description n Low Phase Noise and Jitter n Additive Jitter: 18fsRMS (12kHz to 20MHz) n Additive Jitter: 85fsRMS (10Hz to Nyquist) n EZSync™ Multichip Clock Edge Synchronization n Full PLL Core with Lock Indicator n - 226dBc/Hz Normalized In-Band Phase Noise Floor n - 274dBc/Hz Normalized 1/f Phase Noise n1.4GHz Maximum VCO Input Frequency n Four Independent, Low Noise 1.4GHz LVPECL Outputs n One LVDS/CMOS Configurable Output n Five Independently Programmable Dividers Covering All Integers from 1 to 63 n Five Independently Programmable VCO Clock Cycle Delays Covering All Integers from 0 to 63 n - 40°C...