MX25L512
Description
MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. MX25L512 features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus.
Key Features
- Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
- 524,288 x 1 bit structure
- 16 Equal Sectors with 4K byte each - Any Sector can be erased individually
- Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations
- Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE
- High Performance - Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load) - Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page) - Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb)
- Low Power Consumption - Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz - Low active programming current: 15mA (max.) - Low active erase current: 15mA (max.) - Low standby current: 10uA (max.) - Deep power-down mode 1uA (typical)
- Minimum 100,000 erase/program cycles SOFTWARE FEATURES
- Input Data Format - 1-byte Command code
- Block Lock protection - The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase instructions.
