MX98726 Overview
ADVANCED INFORMATION MX98726 SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0.
MX98726 Key Features
- Direct interface to 80188/186 up to 40Mhz
- Integrated 10/100 TP tranceiver on chip to reduce overall cost
- Fully ply to IEEE 802.3u spec
- Best fit in network printer and hub/switch management application
- A local DMA channel between on-chip FIFOs and packet memory
- Shared memory architecture allow host and MX98726 to use only one single SRAM
- Host DMA can share packet memory with local DMA with simple hand shake protocol for x188/186 type of processor
- Support bus size configuration
- CPU : 8 bits, SRAM: 8 bits
- CPU : 16 bits, SRAM: 8/16 bits