DS34S104 Datasheet PDF ((DS34S101 - DS34S108) Single/Dual/Quad/Octal TDM-over-Packet Chip) | Download Maxim Integrated Products DS34S104

DS34S104 - (DS34S101 - DS34S108) Single/Dual/Quad/Octal TDM-over-Packet Chip

This page provides the datasheet information for the DS34S104, a member of the DS34S101 (DS34S101 - DS34S108) Single/Dual/Quad/Octal TDM-over-Packet Chip family.

Description

These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks.

Features

es Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks Full Support for These Mapping Methods: SAToP, CESoPSN, TDMoIP (AAL1), HDLC, Unstructured, Structured, Structured with CAS Adaptive Clock Recovery, Common Clock, External Clock and Loopback Timing Modes On-Chip TDM Clock Recovery Machines, One Per Port, Independently Configurable Clock Recovery Algorithm Handles Network PDV, Packet Loss, Constant Delay Changes, Frequency Changes and Other Impairments 64 Indepe.

Datasheet Details

Part number	DS34S104
Manufacturer	Maxim Integrated Products
File Size	1.38 MB
Description	(DS34S101 - DS34S108) Single/Dual/Quad/Octal TDM-over-Packet Chip
Datasheet	DS34S104 Datasheet
Additional preview pages of the DS34S104 datasheet.

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Full PDF Text Transcription

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ABRIDGED DATA SHEET www.DataSheet4U.com Rev: 101708 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. TDM data is transported in up to 64 individually configurable bundles. All standardsbased TDM-over-packet mapping methods are supported except AAL2. Frame-based serial HDLC data flows are also supported. The high level of integration available with the DS34S10x devices minimizes cost, board space, and time to market.

Published: Jun 22, 2009 |