Download MAX3873A Datasheet PDF
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MAX3873A Description

The MAX3873A is a pact, low-power 2.488Gbps/ 2.67Gbps clock-recovery and data-retiming IC for SDH/SONET applications. The phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The input data is then retimed by this recovered clock, providing a clean data output.

MAX3873A Key Features

  • Fully Integrated Clock Recovery and Data Retiming
  • Power Dissipation: 260mW with +3.3V Supply
  • Clock Jitter Generation: 5mUIRMS
  • Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications
  • Differential Input Range: 50mVP-P to 1.6VP-P
  • Single +3.3V Power Supply
  • PLL Fast Track (FASTRACK) Mode Available
  • Clock Output Can Be Disabled
  • Input Data Rate: 2.488Gbps or 2.67Gbps
  • Selectable Output Amplitude