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MAX9320B - 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description

The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution.

The input is reproduced at two differential outputs.

The differential input can be adapted to accept single-ended inputs by applying an external reference voltage.

Key Features

  • ultra-low propagation delay (208ps), part-to-part skew (20ps), and output-to-output skew (6ps) with 30mA maximum supply current, making this device ideal for clock distribution. For interfacing to differential PECL and LVPECL signals, this device operates over a +3.0V to +5.5V supply range, allowing high-performance clock or data distribution in systems with a nominal 3.3V or 5V supply. For differential ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply. The MAX9320B is o.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-2383; Rev 1; 11/03 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. The MAX9320B features ultra-low propagation delay (208ps), part-to-part skew (20ps), and output-to-output skew (6ps) with 30mA maximum supply current, making this device ideal for clock distribution. For interfacing to differential PECL and LVPECL signals, this device operates over a +3.0V to +5.5V supply range, allowing high-performance clock or data distribution in systems with a nominal 3.3V or 5V supply.