Download SY100E310L Datasheet PDF
SY100E310L page 2
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SY100E310L Description

The SY100E310L is a 3.3V, precision 2:8 ECL/PECL fanout buffer optimized for precision low-skew clock distribution.

SY100E310L Key Features

  • > 800MHz fMAX (typical)
  • < 50ps within-device skew
  • LVPECL: +3.3V ±10%
  • LVECL: -3.3V ±10%
  • 40°C to +85°C s Pin-for-pin, plug-in replacement for MC100LVE310 s Available in 28-pin PLCC package