This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | SY100S834L |
|---|---|
| Datasheet | SY100S834L SY100S834 Datasheet (PDF) |
| File Size | 177.49 KB |
| Manufacturer | Micrel Semiconductor (now Microchip Technology) |
| Description | Clock Generation Chip |
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The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the mon output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal.
See all Micrel Semiconductor (now Microchip Technology) datasheets
| Part Number | Description |
|---|---|
| SY100S834 | Clock Generation Chip |
| SY100S838 | CLOCK GENERATION CHIP |
| SY100S838L | CLOCK GENERATION CHIP |
| SY100S839V | CLOCK GENERATION CHIP |
| SY100S811 | SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL |
| SY100S815 | SINGLE SUPPLY QUAD PECL/TTL-TO-PECL |
| SY100S863 | 8-Input Pecl Differential Mux |
| SY100S891 | 5-BIT Registered Transceiver |
| SY100S301 | Triple 5-INPUT OR/NOR GATE |
| SY100S302 | Quint 2-INPUT OR/NOR GATE |
