Download SY100S839V Datasheet PDF
SY100S839V page 2
Page 2
SY100S839V page 3
Page 3

SY100S839V Description

The SY100S839V is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the mon output edges are all precisely aligned. The device can be driven by either a differential or single-ended ECL/LVECL or, if positive power supplies are used, PECL/LVPECL input signal.