SY69753L Description
The SY69753L is a plete Clock Recovery and Data Retiming integrated circuit for OC-3/STS-3 applications at 155Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the ining data stream.
SY69753L Key Features
- 3.3V power supply
- SONET/SDH/ATM patible
- Clock and data recovery for 125Mbps/155Mbps NRZ
- Two on-chip PLLs: one for clock generation and
- Selectable reference frequencies
- Differential PECL high-speed serial I/O
- Line receiver input: no external buffering needed
- Link fault indication
- 100k ECL patible I/O
- Industrial temperature range (-40°C to +85°C)