SY89325L Datasheet | Micrel Semiconductor

FEATURES - Guaranteed AC performance over temp and voltage: - DC-to >1.5Gbps data rate throughput - >750MHz clock f MAX - <50ps within-device skew - Ultra-low jitter design: - <1ps RMS random jitter - <10ps PP deterministic jitter - <1ps RMS cycle-to-cycle jitter - <10ps PP total jitter (clock) - Accepts CML, PECL, LVPECL inputs - 350m V LVDS output swing - Power supply 3.3V ±10% or 5.0V ±10% - - 40°C to +85°C temperature range - Available in ultra-small (2mm × 2mm) 8-pin MLF® package APPLICATIONS - High-speed logic - Data munications systems - Wireless munications systems - Tele systems Precision Edge® DESCRIPTION The SY89325V is a fully differential, CML/PECL/LVPECLto-LVDS translator. It achieves LVDS signaling up to 1.5Gbps and clock rates of 750MHz, depending of the distance and the characteristics of the media and noise coupling sources. LVDS is intended to drive 50Ω impedance transmission line media such as PCB traces, backplanes, or cables. SY89325V inputs can be terminated with a single resistor between the true and plement pins of the input. The SY89325V is a member of Micrel’s Precision Edge® family of high-speed logic devices. This family features ultra-small packaging, high signal integrity, and operation at many different supply voltages. For applications that require dual translators, consider the SY55855V. All support documentation can be found on Micrel’s web site at .micrel.. FUNCTIONAL BLOCK DIAGRAM NC 1 CML/PECL/LVPECL IN 2 Input /IN 3 NC 4 8 VCC 7Q 6 /Q LVDS Output 5 VEE 8-Pin MLF® (2mm × 2mm) TYPICAL APPLICATIONS CIRCUIT Backplane SY89325V 100m V Input...