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SY100E143 Datasheet PDF

Micrel SY100E143

The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data.
  • Max Operating Temp : 85°C
  • Min Operating Temp : 0°C
Source: Octopart
Part No. SY100E143
Datasheet SY100E143 Download
Manufacturer
Micrel
Description 9-BIT HOLD REGISTER
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SY100E143 datasheet page 1 preview

FEATURES

s 700MHz min. operating frequency s Extended 100E VEE range of –4.2V to –5.5V s 9 bits wide for byte-parity applications s Asynchronous Master Reset s Dual clocks s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75kΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E143 s Available in 28-pin PLCC package BLOCK DIAGRAM D MUX D0 R D D1 MUX R D MUX D2 R D MUX D3 R D D4 MUX R D MUX D5 R D D6 MUX R D D7 MUX R D8 SEL CLK1 CLK2 MR MUX D R M9999-032006 hbwhelp@micrel.com or (408) 955-1690 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8

DESCRIPTION

The E143 can hold current data or load new data. The SEL (Select) control pin serves to determine the mode of operation; either HOLD or LOAD. The input data has to meet the set-up time before being clocked into the nine input registers on the rising edge of CLK1 or CLK2. The MR (Master Reset) control signal asynchronously resets all nine registers to a logic LOW when a logic HIGH is applied to MR. The E143 is designed for applications requiring highspeed registers, pipeline registers, synchronous operation, and is also suitable for byte-wide parity.
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