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SY89874U Datasheet Programmable Clock Divider/fanout Buffer

Manufacturer: Microchip Technology

Overview: SY89874U 2.5 GHz, Any Differential In-to-LVPECL, Programmable Clock Divider/Fanout Buffer with Internal.

General Description

This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622 MHz or higher) CML, LVPECL, LVDS, or HSTL clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock.

Available divider ratios are 2, 4, 8, and 16, or straight pass-through.

In a typical 622 MHz clock system this would provide availability of 311 MHz, 155 MHz, 77 MHz, or 38 MHz auxiliary clock components.

Key Features

  • Integrated Programmable Clock Divider and 1:2 Fanout Buffer.
  • Guaranteed AC Performance over Temperature and Voltage: - >2.5 GHz fMAX -.

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