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SY89874AU - 2.5GHz Any-In to LVPECL Programmable Clock Divider/Fanout Buffer

General Description

This low-skew, low-jitter device can accept a high-speed (622MHz or higher) LVTTL, LVCMOS, CML, LVPECL, LVDS or HSTL clock input signal and divide down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock.

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Datasheet Details

Part number SY89874AU
Manufacturer Micrel Semiconductor
File Size 541.52 KB
Description 2.5GHz Any-In to LVPECL Programmable Clock Divider/Fanout Buffer
Datasheet download datasheet SY89874AU Datasheet

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Part Number Description
SY89874U Programmable Clock Divider/Fanout Buffer
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SY89874AU 2.5GHz, Any-In to LVPECL, Programmable Clock Divider/Fanout Buffer with Internal Termination General Description This low-skew, low-jitter device can accept a high-speed (622MHz or higher) LVTTL, LVCMOS, CML, LVPECL, LVDS or HSTL clock input signal and divide down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock. Available divider ratios are 2, 4, 8, and 16, or straight pass-through. In a typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz, or 38MHz auxiliary clock components. The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin.