Datasheet Summary
m o .c U 4 t ™ 2Mb SYNCBURST e e h SRAM S a t a D Features
. w w w
NOT REENDED FOR NEW DESIGNS
2Mb: 128K x 18, 64K x 32/36 PIPELINED, SCD SYNCBURST SRAM
MT58L128L18P, MT58L64L32P, MT58L64L36P; MT58L128V18P, MT58L64V32P, MT58L64V36P
3.3V VDD, 3.3V or 2.5V I/O, Pipelined, SingleCycle Deselect
- Fast clock and OE# access times
- Single +3.3V +0.3V/-0.165V power supply (VDD)
- Separate +3.3V or +2.5V isolated output buffer supply (VDDQ)
- SNOOZE MODE for reduced-power standby
- Single-cycle deselect (Pentium® BSRAM-patible)
- mon data inputs and data outputs
- Individual BYTE WRITE control and GLOBAL WRITE
- Three chip enables for simple depth expansion and address pipelining
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