46V16M8 Datasheet | Micron Technology

PRELIMINARY‡ 128Mb: x4, x8, x16 DDR SDRAM DOUBLE DATA RATE (DDR) SDRAM Features - VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V - Bidirectional data strobe (DQS) transmitted/ received with data, i.e., source-synchronous data .. capture (x16 has two - one per byte) - Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle - Differential clock inputs (CK and CK#) - mands entered on each positive CK edge - DQS edge-aligned with data for READs; centeraligned with data for WRITEs - DLL to align DQ and DQS transitions with CK - Four internal banks for concurrent operation - Data mask (DM) for masking write data (x16 has two - one per byte) - x16...