MT28F800B5 Datasheet | Micron Technology

.. 8Mb SMART 5 BOOT BLOCK FLASH MEMORY FLASH MEMORY Features MT28F008B5 MT28F800B5 5V Only, Dual Supply (Smart 5) 0.18µm Process Technology - Eleven erase blocks: 16KB/8K-word boot block (protected) 40-Pin TSOP Type I 48-Pin TSOP Type I Two 8KB/4K-word parameter blocks - Eight main memory blocks - Smart 5 technology (B5): 5V ±10% VCC 5V ±10% VPP application/ production programming1 - Advanced 0.18µm CMOS floating-gate process 44-Pin SOP2 - patible with 0.3µm Smart 5 device - Address access time: 80ns - 100,000 ERASE cycles - Industry-standard pinouts - Automated write and erase algorithm - Two-cycle WRITE/ERASE sequence Data Shee - TSOP and SOP packaging options - Byte- or word-wide READ and WRITE . (MT28F800B5, 1 Meg x 8/512K x 16) GENERAL DESCRIPTION The MT28F008B5 (x8) and MT28F800B5 (x16/x8) OPTIONS MARKING are nonvolatile, electrically block-erasable (Flash), - Timing programmable read-only memories containing 80ns -8 8,388,608 bits organized as 524,288 words (16 bits) or - Configurations 1,048,576 bytes (8 bits). Writing or erasing the device is 1 Meg x 8 MT28F008B5 done with a 5V VPP voltage, while all operations are 512K x 16/1 Meg x 8 MT28F800B5 performed with a 5V VCC. Due to process technology - Boot Block Starting Word Address advances, 5V VPP is optimal for application and pro Top T duction programming. These devices are fabricated Bottom B with Micron’s advanced 0.18µm CMOS floating-gate - Operating Temperature Range process. mercial (0ºC to +70ºC) None The MT28F008B5 and MT28F800B5 are organized Extended (-40ºC to +85ºC) ET into eleven separately erasable blocks. To ensure that - Packages critical firmware is protected from accidental erasure MT28F008B5 or overwrite, the devices feature a hardware-protected Plastic 40-pin TSOP Type I VG boot block. This block may be used to store code (10mm x 29mm) implemented in low-level system recovery. The MT28F800B5 remaining blocks vary in density and are written and...