MT4LC4M16N3 Overview
4 MEG x 16 EDO DRAM.
MT4LC4M16N3 Key Features
- Single +3.3V ±0.3V power supply
- Industry-standard x16 pinout, timing, functions, and package
- High-performance CMOS silicon-gate process
- All inputs, outputs and clocks are LVTTL-patible
- Extended Data-Out (EDO) PAGE MODE access
- 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms
- Optional self refresh (S) for low-power data retention
- Plastic Package 50-pin TSOP (400 mil)
- Timing 50ns access 60ns access
- Refresh Rates 4K 8K Standard Refresh Self Refresh