MT4LC8M8C2 Overview
The 8 Meg x 8 DRAM is a high-speed CMOS, dynamic random-access memory devices containing 67,108,864 bits and designed to operate from 3V to 3.6V. 5/00 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000, Micron Technology, Inc.
MT4LC8M8C2 Key Features
- Single +3.3V ±0.3V power supply
- Industry-standard x8 pinout, timing, functions, and packages
- High-performance CMOS silicon-gate process
- All inputs, outputs and clocks are LVTTLpatible
- Extended Data-Out (EDO) PAGE MODE access
- 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms
- Optional self refresh (S) for low-power data retention
- Refresh Addressing 4,096 (4K) rows 8,192 (8K) rows
- Plastic Packages 32-pin SOJ (400 mil) 32-pin TSOP (400 mil)
- Timing 50ns access 60ns access