MT4LC8M8E1 Datasheet PDF (DRAM) | Download Micron Technology MT4LC8M8E1

MT4LC8M8E1 - DRAM

Description

The 8 Meg x 8 DRAMs are high-speed CMOS, dynamic random-access memory devices containing 67,108,864 bits organized in a x8 configuration.

The 8 Meg x 8 DRAMs are functionally organized as 8,388,608 locations containing eight bits each.

Features

Single +3.3V ±0.3V power supply.
Industry-standard x8 pinout, timing, functions, and packages.
13 row, 10 column addresses (E1) or 12 row, 11 column addresses (B6).
High-performance CMOS silicon-gate process.
All inputs, outputs and clocks are LVTTLcompatible.
FAST PAGE MODE (FPM) access.
4,096-cycle CAS#-BEFORE-RAS# (CBR).

Datasheet Details

Part number	MT4LC8M8E1
Manufacturer	Micron Technology
File Size	382.20 KB
Description	DRAM
Datasheet	MT4LC8M8E1 Datasheet
Additional preview pages of the MT4LC8M8E1 datasheet.

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Full PDF Text Transcription

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8 MEG x 8 FPM DRAM DRAM FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x8 pinout, timing, functions, and packages • 13 row, 10 column addresses (E1) or 12 row, 11 column addresses (B6) • High-performance CMOS silicon-gate process • All inputs, outputs and clocks are LVTTLcompatible • FAST PAGE MODE (FPM) access • 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms • Optional self refresh (S) for low-power data retention MT4LC8M8E1, MT4LC8M8B6 For the latest data sheet, please refer to the Micron Web site: www.micron.com/products/datasheets/dramds.

Published: Jan 16, 2006 |