M5M4V64S30ATP-8L Datasheet PDF - Mitsubishi 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM Specs

M5M4V64S30ATP-8L - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

This page provides the datasheet information for the M5M4V64S30ATP-8L, a member of the M5M 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM family.

Datasheet Summary

Description

The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface.

All inputs and outputs are referenced to the rising edge of CLK.

The M5M4V64S30ATP achieves very high speed data rate up to 125MHz, and is suitable for main memory or graphic memory in computer systems.

Features

- Single 3.3v±0.3v power supply - Clock frequency 125MHz /100MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/Full Page (programmable) - Burst type- sequential / interleave (programmable) - Column access - random - Burst Write / Single Write (programmable) - Auto precharge / All bank precharge controlled by A10 - Auto refresh and Self refresh - 4096 refresh cycles.

Datasheet Details

Part number	M5M4V64S30ATP-8L
Manufacturer	Mitsubishi
File Size	1.06 MB
Description	64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Datasheet	M5M4V64S30ATP-8L Datasheet
Additional preview pages of the M5M4V64S30ATP-8L datasheet.

📁 Similar Datasheet

M5M417800AJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)

M5M417800CJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)

M5M417800DJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)

M5M417805CJ - Hyper Page Mode 16M-Bit DRAM (Mitsubishi Electric)

M5M417805DJ - EDO Mode 16M-Bit DRAM (Mitsubishi Electric)

M5M4256AJ-10 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

M5M4256AJ-12 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

M5M4256AJ-15 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

M5M4256AJ-85 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

M5M4256AL-10 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

Full PDF Text Transcription

Click to expand full text

MITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98 M5M4V64S30ATP-8A,-8L,-8, -10L, -10 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM Some of contents are subject to change without notice. PIN CONFIGURATION (TOP VIEW) Vdd DQ0 VddQ NC DQ1 VssQ NC DQ2 VddQ NC DQ3 VssQ NC Vdd NC /WE /CAS /RAS /CS BA0(A13) BA1(A12) A10 A0 A1 A2 A3 Vdd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 Vss DQ7 VssQ NC DQ6 VddQ NC DQ5 VssQ NC DQ4 VddQ NC Vss NC DQM CLK CKE NC A11 A9 A8 A7 A6 A5 A4 Vss DESCRIPTION The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK.

Published: Apr 26, 2005 |