YT9215RB Datasheet | Motorcomm

Description YT9215RB is a LQFP128 E-PAD, high-performance 5+2-port Gigabit Ethernet switch. It integrates five PHY ports support 1000Base-T/100Base-TX/10Base-Te, and supports two extra MAC ports for specific applications which support MII/RMII/RGMII. YT9215RB is also embedded with a RSIC-V microprocessor. The integrated GIGA-PHY plies with 10BASE-Te, 100BASE-TX, and 1000BASE-T IEEE standard 802.3 and also support Motorm proprietary LRE100-4 feature , which makes the device can auto-negotiate and link up with LRE100-4 pliant link partners. LRE100-4 in extended cable length applications up to 400 meter at 100Mbps over CAT5E cable. The Extension GMAC1 and Extension GMAC2 of the YT9215RB support x MII for connecting with an external PHY, MAC, external CPU or RISC in specific applications. The x MII refer to Reduced Gigabit Media Independent Interface (RGMII), Media Independent Interface (MII), and Reduced Media Independent Interface (RMII). YT9215RB integrates a 4K look-up table with an efficient hashing algorithm for address searching and learning, each of the entries can be configured as a static entry. YT9215RB supports IEEE 802.1Q VLAN and has a 4K-entry VLAN table. It provides VLAN classification according to port-based, protocol-and-port-based, VLAN translation ,Flow-based capability，and MAC-based, IP-subnet-based VLAN can be supported by configuration It also supports IVL, SVL, and IVL/SVL for flexible network topology architecture. The YT9215RB supports standard 802.3x flow control frames for full duplex, and optional backpressure for half duplex. It determines when to invoke the flow control mechanism by checking the availability of system resources. The YT9215RB supports storm control. In order to support flexible traffic classification, the YT9215RB supports 384-hardware entry ACL rule check and multiple actions options. The 384 entries are posed of 48 rows, each row has 8 entries. To support long rule, rule extension is supported by any binations of the 8...