MC100ELT21
features
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The VBB output allows the ELT21 to also be used in a single-ended input mode. In this mode the VBB output is tied to the IN input for a non-inverting buffer or the IN input for an inverting buffer. If used the VBB pin should be bypassed to ground via a 0.01µF capacitor.
The ELT21 is available in both ECL standards: the 10ELT is patible with positive MECL 10H logic levels while the 100ELT is patible with positive ECL 100K logic levels.
- 3.5ns Typical Propagation Delay
- Differential PECL Inputs
- Small...
