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MC100ES6130 - 2.5/3.3V 1:4 PECL Clock Driver

General Description

Number 1, 2, 3, 4, 5, 6, 7, 8 9 10 Name Q0 to Q3 Q0 to Q3 VEE IN_SEL Description LVPECL differential outputs: Terminate with 50Ω to VCC

2V.

2V.

Negative power supply: For LVPECL applications, connect to GND.

Key Features

  • a 2:1 input MUX which is ideal for redundant clock switchover.

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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC100ES6111 LOW VOLTAGE 2.5/3.3V DIFFIERENTIAL ECL / PECL/ HSTL FANOUT BUFFER
MC100ES6011 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer
MC100ES6222 Low Voltage 1:15 Differential ECL/PECL Clock Divider and Fanout Buffer
MC100ES6226 2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider
MC100ES6254 2.5/3.3V Differential LVPECL 2x2 Clock Switch and Fanout Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order number: MC100ES6130 Rev 1, 5/2004 2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse. Features MC100ES6130 DT SUFFIX 16 LEAD TSSOP PACKAGE CASE 948F Freescale Semiconductor, Inc...