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MC100ES6226 - 2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider

General Description

MC100ES6226 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz.

Key Features

  • es: Fully differential architecture from input to all outputs SiGe technology supports near-zero output skew Selectable 1:1 or 1:2 frequency outputs LVPECL compatible differential clock inputs and outputs LVCMOS compatible control inputs Single 3.3V or 2.5V supply Max. 35 ps maximum output skew (within output bank) Max. 50 ps maximum device skew Supports DC operation and up to 3 GHz (typ. ) clock signals FA SUFFIX 32.
  • LEAD LQFP.

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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC100ES6222 Low Voltage 1:15 Differential ECL/PECL Clock Divider and Fanout Buffer
MC100ES6254 2.5/3.3V Differential LVPECL 2x2 Clock Switch and Fanout Buffer
MC100ES6011 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer
MC100ES6111 LOW VOLTAGE 2.5/3.3V DIFFIERENTIAL ECL / PECL/ HSTL FANOUT BUFFER
MC100ES6130 2.5/3.3V 1:4 PECL Clock Driver

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Freescale Semiconductor, Inc.Order Number: MC100ES6226/D Rev 1, 12/2001 www.DataSheet4U.com 2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider The Motorola MC100ES6226 is a bipolar monolithic differential clock distribution buffer and clock divider. Designed for most demanding clock distribution systems, the MC100ES6226 supports various applications that require a large number of outputs to drive precisely aligned clock signals. Using SiGe technology and a fully differential architecture, the device offers superior digitial signal characteristics and very low clock skew error.