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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual L VTTL/L VCMOS to Differential L VPECL T ranslator MC100LVELT22
The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.
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350ps Typical Propagation Delay <100ps Output–to–Output Skew Differential LVPECL Outputs Small Outline SOIC Package Flow Through Pinouts
8 1
D SUFFIX 8–LEAD PLASTIC SOIC PACKAGE CASE 751-05
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Q0 1
8
VCC
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MC100LVELT22 Datasheet
