Description
Pin Locations 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 81, 83, 85, 98, 100 3, 5, 9, 11, 16, 18, 22, 24, 28, 52, 56, 58, 62, 64, 69, 71, 75, 77 90 91 92 Symbol A0
A15 D0
D17 E1 E2 G Type Input Input Input Input Input Description Synchronous Address Inputs: These inputs are reg
Features
- separate data input and data output buffers and incorporates input and output registers on board with high speed SRAM. The MCM69Q618 allows the user to perform transparent write and data pass through. Two data bus ports are provided.
- a data input (D) and a data output (Q) port. The synchronous design allows for precise cycle control with the use of an external single clock (K). Address port, data input (D0.
- D17), data output (Q0.
- Q17), write enable (W), chip enables (E.
MCM69Q618 Datasheet
