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MTP12N06EZL - TMOS POWER FET

Key Features

  • 2 A TJ = 25°C 20 10 0 10 60 1000 VDD = 30 V ID = 12 A VGS = 5 V TJ = 25°C t, TIME (ns) tr tf td(off) 100 td(on) VDS , DRAIN.
  • TO.
  • SOURCE.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTP12N06EZL/D ™ Data Sheet TMOS E-FET.™ High Energy Power FET Designer's MTP12N06EZL N–Channel Enhancement–Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a gate–to–source zener diode designed for 4 kV ESD protection (human body model). • • • • • ESD Protected 4 kV Human Body Model 400 V Machine Model Avalanche Energy Capability Internal Source–To–Drain Diode Designed to Replace External Zener Transient Suppressor–Absorbs High Energy in the Avalanche Mode G TMOS POWER FET 12 AMPERES 60 VOLTS RDS(on) = 0.