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UPA104 Datasheet PDF

NEC UPA104

The µPA104 is a user-configurable, Si bipolar transistor array for formation of high speed OR/NOR gates. Its internal transistor configuration and external connection options allow the user considerable flexibility in its application.
Part No. UPA104
Datasheet UPA104 Download
Manufacturer
NEC
Description HIGH FREQUENCY NPN TRANSISTOR ARRAY
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UPA104 datasheet page 1 preview

FEATURES

● 9 GHz CONFIGURABLE TRANSISTOR BASED OR/NOR CIRCUITRY
● OUTSTANDING hFE LINEARITY
● TWO PACKAGE OPTIONS: µPA104B: Studded ceramic package provides superior thermal dissipation µPA104G: Reduced circuit size due to 14-pin plastic SOP package for surface mounting
● EXCELLENT FOR ANALOG ADDITIONS & FORMATION OF 2-INPUT OR/NOR GATES

DESCRIPTION

AND

APPLICATIONS

Its high gain bandwidth product (fT = 9 GHz) make it applicable for electro-optical, signal processing, cellular telephone systems, instrumentation, and high speed gigabit logic circuits. ORDERING INFORMATION PART NUMBER PACKAGE 14-pin ceramic package 14-pin plastic SOP (225 mil) µPA104B-E1 µPA104G-E1

ABSOLUTE MAXIMUM RATINGS

(TA = +25 °C) SYMBOLS VCBO* VCEO* VEBO* IC * PT PARAMETERS Collector to Base Voltage Collector to Emitter Voltage Emitter to Base Voltage Collector Current Power Dissipation µPA104B µPA104G Junction Temperature µPA104B µPA104G Storage Temperature µPA104B µPA104G UNITS V V V mA mW mW °C °C °C °C RATINGS 15 6 2.5 40 650 350 200 125 –55 to +200 –55 to +125 TJ TSTG * Absolute maximum ratings for each transistor.
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