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UPB1009K - NECs LOW POWER GPS RF RECEIVER BIPOLAR ANALOG + INTEGRATED CIRCUIT

General Description

The µPB1009K is a silicon monolithic IC developed for GPS receivers.

filter, 4-bit ADC, and digital control interface to reduce cost and mounting space.

In addition, its power consumption is low.

Key Features

  • Double conversion.
  • Multiple system clocks.
  • A/D converter.
  • High-density RF block.
  • Supply voltage.
  • Low current consumption.
  • High-density surface mountable : fREFin = 16.368 MHz, f1stIFin = 61.380 MHz, f2ndIFin = 4.092 MHz : fREFin = 14.4, 16.384, 19.2, 26 MHz, f1stIFin = 62.980 MHz, f2ndIFin = 2.556 MHz : On-chip switchable frequency divider (1/N = 100, 3/256, 9/1024, 65/4096) : On-chip 4-bit A/D converter : On-chip VCO tank circuit a.

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NEC’s LOW POWER GPS RF RECEIVER BIPOLAR ANALOG + INTEGRATED CIRCUIT UPB1009K DESCRIPTION The µPB1009K is a silicon monolithic IC developed for GPS receivers. This IC integrates a full VCO, second IF filter, 4-bit ADC, and digital control interface to reduce cost and mounting space. In addition, its power consumption is low. Moreover, use of a TCXO with frequency of 16.368 MHz/16.384 MHz, 14.4 MHz, 19.2 MHz, or 26 MHz switchable with an on-chip divider is possible. NEC’s stringent quality assurance and test procedures ensure the highest reliability and performance. FEATURES • Double conversion • Multiple system clocks • A/D converter • High-density RF block • Supply voltage • Low current consumption • High-density surface mountable : fREFin = 16.368 MHz, f1stIFin = 61.