UPC4092 Datasheet J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

Manufacturer: NEC (now Renesas Electronics)

UPC4092 j-fet input low-offset dual operational amplifier by NEC (now Renesas Electronics) - Datasheet Preview

Datasheet Details

Part number	UPC4092
Manufacturer	NEC (now Renesas Electronics)
File Size	87.46 KB
Description	J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER
Datasheet	UPC4092 Datasheet

Overview

DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC4092 J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER The µPC4092 dual operational amplifier offers high input impedance, low offset voltage, high slew rate, and stable AC operating characteristics.

NEC's unique high-speed PNP transistor (f T = 300 MHz) in the output stage solves the oscillation problem of current sinking with a large capacitive load.

Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift characteristics.

Key Features

Stable operation with 10000 pF capacitive load.
Low input offset voltage ±3 mV (MAX. ) ±7 µV/°C (TYP. ) temperature drift.
Very low input bias and offset currents.
Low noise : en = 19 nV/ √Hz (TYP. ).
Output short circuit protection.
High input impedance J-FET Input Stage.
Internal frequency compensation.
High slew rate: 15 V/µs (TYP. ).

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