UPC4093 Datasheet J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER

Manufacturer: NEC (now Renesas Electronics)

UPC4093 j-fet input low-offset operational amplifier by NEC (now Renesas Electronics) - Datasheet Preview

Datasheet Details

Part number	UPC4093
Manufacturer	NEC (now Renesas Electronics)
File Size	90.69 KB
Description	J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER
Datasheet	UPC4093 Datasheet

Overview

DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC4093 J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER The µPC4093 operational amplifier is a high-speed version of the µPC4091.

NEC's unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation problem.

Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift characteristics.

Key Features

Stable operation with 220 pF capacitive load.
Low input offset voltage and offset voltage null capability ±2.5 mV (MAX. ) ±7 µV/°C (TYP. ) temperature drift.
Very low input bias and offset currents.
Low noise : en = 19 nV/ √Hz (TYP. ).
Output short circuit protection.
High input impedance J-FET Input Stage.
Internal frequency compensation.
High slew rate: 25 V/µs (TYP. ).

More Datasheets from NEC (now Renesas Electronics)

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UPC4064	DUAL J-FET INPUT LOW-POWER OPERATIONAL AMPLIFIER
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UPC4072	LOW NOISE J-FET INPUT DUAL OPERATIONAL AMPLIFIER
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