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UPC4094 Datasheet J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

Manufacturer: NEC (now Renesas Electronics)

Overview

DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC4094 J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092.

NEC's unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation problem.

Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift characteristics.

Key Features

  • Stable operation with 220 pF capacitive load.
  • Low input offset voltage and offset voltage ±3 mV (MAX. ) ±7 µV/°C (TYP. ) temperature drift.
  • Very low input bias and offset currents.
  • Low noise : en = 19 nV/ √Hz (TYP. ).
  • Output short circuit protection.
  • High input impedance J-FET Input Stage.
  • Internal frequency compensation.
  • High slew rate: 25 V/µs (TYP. ).